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8-lead narrow body soic (so-8) ssm2275 out a ?n a +in a v out b ?n b +in b v+ 1 2 3 4 8 7 6 5 (not to scale) 8-lead microsoic (rm-8) ?n a +in a v out b ?n b +in b v+ 1 4 5 8 ssm2275 out a 8-lead plastic dip (n-8) ssm2275 1 2 3 4 8 7 6 5 out a ?n a +in a v +in b ?n b out b v+ (not to scale) rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a rail-to-rail output audio amplifiers ssm2275/ssm2475* one technology way, p.o. box 9106, norwood. ma 02062-9106, u.s.a. tel: 781/329-4700 world wide web site: http://www.analog.com fax: 781/326-8703 ? analog devices, inc., 1997 general description the ssm2275 and ssm2475 use the butler amplifier front end, which combines both bipolar and fet transistors to offer the accuracy and low noise performance of bipolar transistors and the slew rates and sound quality of fets. this product family includes dual and quad rail-to-rail output audio amplifi- ers that achieve lower production costs than the industry stan- dard op275 (the first butler amplifier offered by analog devices). this lower cost amplifier also offers operation from a single 5 v supply, in addition to conventional 15 v supplies. the ac performance meets the needs of the most demanding au- dio applications, with 8 mhz bandwidth, 12 v/ m s slew rate and extremely low distortion. the ssm2275 and ssm2475 are ideal for application in high performance audio amplifiers, recording equipment, synthesiz- ers, midi instruments and computer sound cards. where cas- caded stages demand low noise and predictable performance, ssm2275 and ssm2475 are a cost effective solution. both are stable even when driving capacitive loads. the ability to swing rail-to-rail at the outputs (see applications sec- tion) and operate from low supply voltages enables designers to at- tain high quality audio performance, even in single supply systems. the ssm2275 and ssm2475 are specified over the extended industrial (C40 c to +85 c) temperature range and are available in 8-lead plastic dips, soics, and microsoic surface mount pack- ages. the ssm2475 is available in 14-lead plastic dips, narrow body soics, and thin shrink small outline ( tssop) surface mount packages. * protected by u.s. patent no. 5,101,126. features single or dual-supply operation excellent sonic characteristics low noise: 7 nv/ ? hz low thd: 0.0006% rail-to-rail output high output current: 6 50 ma low supply current: 1.7 ma/amplifier wide bandwidth: 8 mhz high slew rate: 12 v/ m s no phase reversal unity gain stable stable parameters over temperature applications multimedia audio professional audio systems high performance consumer audio microphone preamplifier midi instruments 14-lead narrow body soic (r-14) out a ?n a +in a v+ ?n d +in d v out d 1 2 3 4 14 13 12 11 +in b ?n b out b ?n c out c +in c 5 6 7 10 9 8 ssm2475 (not to scale) 14-lead tssop (ru-14) out a ?n a +in a v+ ?n d +in d v out d 1 14 +in b ?n b out b ?n c out c +in c 78 1 14 78 ssm2475 14-lead plastic dip (n-14) ssm2475 1 2 3 4 14 13 12 11 out a ?n a +in a v+ v +in d ?n d out d 5 6 7 10 9 8 +in b ?n b out b out c ?n c +in c (not to scale) pin configurations obsolete
rev. 0 C2C ssm2275/ssm2475Cspecifications electrical characteristics parameter symbol conditions min typ max units input characteristics offset voltage v os 14 mv C40 c t a +85 c16mv input bias current i b 250 400 na C40 c t a +85 c 300 500 na input offset current i os 575 na C40 c t a +85 c 15 125 na input voltage range v in v s = 15 v C14 +14 v common-mode rejection ratio cmrr C12.5 v v cm +12.5 v 80 100 db C40 c t a +85 c, C12.5 v v cm +12.5 v 80 100 v/mv a vo r l = 2 k w , C12 v v o +12 v 100 240 v/mv C40 c t a +85 c 80 120 v/mv output characteristics output voltage, high v oh i l 20 ma 14 14.5 v C40 c t a +85 c 14.5 14.7 v output voltage, low v ol i l = 20 ma C14 C13.5 v i l = 10 ma C14.6 C14.4 v i l = 10 ma, C40 c t a +85 c C14.3 C13.9 v output short circuit current limit i sc 25 50 75 ma C40 c t a +85 c 17 40 80 ma power supply power supply rejection ratio psrr 2.5 v v s 18 v 85 110 db C40 c t a +85 c 80 105 db supply current/amplifier i sy v o = 0 v 1.7 2.9 ma C40 c t a +85 c 1.75 3.0 ma dynamic performance total harmonic distortion thd r l = 10 k w , f = 1 khz, v o = 1 v rms 0.0006 % slew rate sr r l = 2 k w? 50 pf 9 12 v/ m s gain bandwidth product gbw 8 mhz channel separation cs r l = 2 k w , f =1 khz 128 db noise performance voltage noise spectral density e n f > 1 khz 8 nv/ ? hz current noise spectral density i n f > 1 khz < 1 pa/ ? hz specifications subject to change without notice. (v s = 6 15 v, t a = 1 25 8 c, v cm = 0 v unless otherwise noted) obsolete
electrical characteristics parameter symbol conditions min typ max units input characteristics offset voltage v os 14 mv C40 c t a +85 c16mv input bias current i b 250 400 na C40 c t a +85 c 300 500 na input offset current i os 575 na C40 c t a +85 c 15 125 na input voltage range v in 0.3 4.7 v common-mode rejection ratio cmrr +0.8 v v cm +2 v 85 db C40 c t a +85 c80db a vo r l = 2 k w , C0.5 v v o +4.5 v 25 60 v/mv C40 c t a +85 c 20 50 v/mv output characteristics output voltage, high v oh i l C15 ma 4.2 4.5 v i l C10 ma, C40 c t a +85 c 4.5 4.8 v output voltage, low v ol i l C15 ma 0.6 1.0 v i l C10 ma 0.3 0.5 v i l C10 ma, C40 c t a +85 c 0.7 1.1 v output short circuit current limit i sc C40 c t a +85 c40ma power supply supply current/amplifier i sy v o = 0 v 1.7 2.9 ma C40 c t a +85 c 1.75 3.0 ma dynamic performance total harmonic distortion thd r l = 10 k w , f = 1 khz, v o = 1 v rms 0.0006 % slew rate sr r l = 2 k w? 50 pf 12 v/ m s gain bandwidth product gbw r l = 2 k w? 10 pf 6 mhz channel separation cs r l = 2 k w , f =1 khz 128 db noise performance voltage noise spectral density e n f > 1 khz 8 nv/ ? hz current noise spectral density i n f > 1 khz < 1 pa/ ? hz specifications subject to change without notice. rev. 0 C3C ssm2275/ssm2475 (v s = 1 5 v, t a = 1 25 8 c, v cm = 2.5 v unless otherwise noted) obsolete
ssm2275/ssm2475 rev. 0 C4C absolute maximum ratings 1 supply voltage (v s ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 v input voltage (v in ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 v differential input voltage 2 . . . . . . . . . . . . . . . . . . . . . . . 15 v storage temperature range . . . . . . . . 2 65 c < t s < 1 150 c operating temperature range . . . . . . . 2 40 c < t a < 1 85 c junction temperature range . . . . . . . . 2 65 c < t s < 1 150 c lead temperature range (soldering, 60 sec) . . . . . . . 1 300 c esd susceptability . . . . . . . . . . . . . . . . . . . . . . . . . . . 2,000 v notes 1 stresses above those listed under absolute maximum ratings may cause perma - nent damage to the device. this is a stress rating only; the functional operation of the device at these or any other conditions above those indicated in the opera tional sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 for supplies less than 15 v, the input voltage and differential input voltage must be less than 15 v. package type u ja * u jc units 8-lead plastic dip 103 43 c/w 8-lead soic 158 43 c/w 8-lead microsoic 206 43 c/w 14-lead plastic dip 83 39 c/w 14-lead soic 120 36 c/w 14-lead tssop 180 35 c/w * q ja is specified for the worst case conditions, i.e., for device in socket for dip packages and soldered onto a circuit board for surface mount packages. caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the ssm2275/ssm2475 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. ordering guide temperature package package model range description options ssm2275p C40 c < t a < +85 c 8-lead pdip n-8 ssm2275s C40 c < t a < +85 c 8-lead soic so-8 ssm2275rm C40 c < t a < +85 c 8-lead microsoic rm-8 ssm2475p C40 c < t a < +85 c 14-lead pdip n-14 ssm2475s C40 c < t a < +85 c 14-lead soic r-14 ssm2275ru C40 c < t a < +85 c 14-lead tssop ru-14 frequency ?hz 100 80 ?0 10 1m 100 gain ?db 1k 10k 100k 60 40 20 0 ?0 10m 40m phase ?degrees 225 180 ?0 135 90 45 0 ?5 v s =
frequency ?hz 100 80 ?0 10 1m 100 gain ?db 1k 10k 100k 60 40 20 0 ?0 10m 40m phase ?degrees 225 180 ?0 135 90 45 0 ?5 v s =
frequency ?khz ?00 ?30 ?60 022 2 amplitude ?dbv 4 6 8 101214 161820 ?10 ?20 ?40 ?50 v sy = +5v a v = +1 r l = 100k v in = 0dbv
ssm2275/ssm2475 rev. 0 C7C 17.5mv 0 0 200ns 20mv figure 15. small signal response; r l = 2 k w , c l = 0 pf, v s = 2.5 v, a v = +1, v in = 100 mv pCp 31.0mv 0 0 200ns 20mv figure 16. small signal response; r l = 2 k w , c l = 100 pf, v s = 2.5 v, a v = +1, v in = 100 mv pCp 38.0mv 0 0 200ns 20mv figure 17. small signal response; r l = 2 k w , c l = 200 pf, v s = 2.5 v, a v = +1, v in = 100 mv pCp 43.0mv 200ns 20mv 0 0 figure 18. small signal response; r l = 2 k w , c l = 300 pf, v s = 2.5 v, a v = +1, v in = 100 mv pCp 10.5mv 0 0 100ns 20mv figure 19. small signal response; r l = 600 w , c l = 0 pf, v s = 15 v, a v = +1, v in = 100 mv pCp 22.5mv 0 0 100ns 20mv figure 20. small signal response; r l = 600 w , c l = 100 pf, v s = 15 v, a v = +1, v in = 100 mv pCp obsolete
ssm2275/ssm2475Ctypical characteristics rev. 0 C8C 29.0mv 0 0 200ns 20mv figure 21. small signal response; r l = 600 w , c l = 200 pf, v s = 15 v, a v = +1, v in = 100 mv pCp 35.5mv 0 0 200ns 20mv figure 22. small signal response; r l = 600 w , c l = 300 pf, v s = 15 v, a v = +1, v in = 100 mv pCp 13.0mv 0 0 100ns 20mv figure 23. small signal response; r l = 2 k w , c l = 0 pf, v s = 15 v, a v = +1, v in = 100 mv pCp 28.0mv 0 0 100ns 20mv figure 24. small signal response; r l = 2 k w , c l = 100 pf, v s = 15 v, a v = +1, v in = 100 mv pCp 100ns 20mv 36.5mv 0 0 figure 25. small signal response; r l = 2 k w , c l = 200 pf, v s = 15 v, a v = +1, v in = 100 mv pCp 42.0mv 0 0 200ns 20mv figure 26. small signal response; r l = 2 k w , c l = 300 pf, v s = 15 v, a v = +1, v in = 100 mv pCp obsolete
ssm2275/ssm2475 rev. 0 C9C input transistors, q1 and q2, when very large differential volt- ages are applied. if the devices differential voltage could exceed 7 v, then the input current should be limited to less than 5 ma. this can be easily done by placing a resistor in series with both inputs. the minimum value of the resistor can be determined by: r v in diff max = - , . 7 001 (1) there are also esd protection diodes that are connected from each input to each power supply rail. these diodes are normally reversed biased, but will turn on if either input voltage exceeds either supply rail by more than 0.6 v. again, should this condi- tion occur the input current should be limited to less than 5 ma. the minimum resistor value should then be: r v ma in in max = , 5 (2) in practice, r in should be placed in series with both inputs to reduce offset voltages caused by input bias current. this is shown in figure 28. + C r in r in v+ vC figure 28. using resistors for input overcurrent protection output voltage phase reversal the ssm2275/ssm2475 was designed to have a wide common- mode range and is immune to output voltage phase reversal with an input voltage within the supply voltages of the device. how- ever, if either of the devices inputs exceeds 0.6 v above the posi- theory of operation the ssm2275 and ssm2475 are low noise and low distortion rail-to-rail output amplifiers that are excellent for audio applica- tions. based on the op275 audiophile amplifier, the ssm2275/ ssm2475 offers many similar performance characteristics with the advantage of a rail-to-rail output from a single supply source. its low input voltage noise figure of 7 nv/ ? hz allows the device to be used in applications requiring high gain, such as microphone preamplifiers. its 11 v/ m s slew rate also allows the ssm2275/ssm2475 to produce wide output voltage swings while maintaining low distortion. in addition, its low harmonic distortion figure of 0.0006% makes the ssm2275 and ssm2475 ideal for high quality audio applications. figure 27 shows the simplified schematic for a single amplifier. the amplifier contains a butler amplifier at the input. this front-end design uses both bipolar and mosfet transistors in the differential input stage. the bipolar devices, q1 and q2, improve the offset voltage and achieve the low noise perfor- mance, while the mos devices, m1 and m2, are used to obtain higher slew rates. the bipolar differential pair is biased with a proportional-to-absolute-temperature (ptat) bias source, ib1, while the mos differential pair is biased with a non-ptat source, ib2. this results in the amplifier having a constant gain- bandwidth product and a constant slew rate over temperature. the amplifier also contains a rail-to-rail output stage that can sink or source up to 50 ma of current. as with any rail-to-rail output amplifier the gain of the output stage, and consequently the open loop gain of the amplifier, is proportional to the load resistance. with a load resistance of 50 k w , the dc gain of the amplifier is over 110 db. at load currents less than 1 ma, the output of the amplifier can swing to within 30 mv of either sup- ply rail. as load current increases, the maximum voltage swing of the output will decrease. this is due to the collector to emit- ter saturation voltage of the output transistors increasing with an increasing collector current. input overvoltage protection the maximum input differential voltage that can be applied to the ssm2275/ssm2475 is 7 v. a pair of internal back-to-back zener diodes are connected across the input terminals. this prevents emitter-base junction breakdown from occurring to the inC in+ q1 q2 m2 m1 ib2 ib1 cf1 v cc v ee out figure 27. simplified schematic obsolete
ssm2275/ssm2475 rev. 0 C10C tive voltage supply, the output could exhibit phase reversal. this is due to the input transistors bCc junction becoming forward biased, causing the polarity of the input terminals of the device to switch. this phase reversal can be prevented by limiting the input cur- rent to +1 ma. this can be done by placing a resistor in series with the input terminal that is expected to be overdriven. the series resistance should be at least: r v ma in in max = - , . 06 1 (3) an equivalent resistor should be placed in series with both in- puts to prevent offset voltages due to input bias currents, as shown in figure 28. output short circuit protection to achieve high quality rail-to-rail performance, the output of the ssm2275/ssm2475 is not short-circuit protected. shorting the output may damage or destroy the device when excessive voltages or currents are applied. to protect the output stage, the maximum output current should be limited to 40 ma. placing a resistor in series with the output of the amplifier as shown in figure 29, the output current can be limited. the minimum value for r x can be found from equation 4. r v ma x sy = 40 (4) for a +5 v single supply application, r x should be at least 125 w . because r x is inside the feedback loop, v out is not affected. the trade off in using r x is a slight reduction in output voltage swing under heavy output current loads. r x will also increase the effective output impedance of the amplifier to r o + r x , where r o is the output impedance of the device. r fb feedback r x 125 w a1 v out a1 = 1/2 ssm2275 figure 29. output short circuit protection configuration power dissipation considerations while many designers are constrained to use very small and low profile packages, reliable operation demands that the maximum junction temperatures not be exceeded. a simple calculation will ensure that your equipment will enjoy reliable operation over a long lifetime. modern ic design allows dual and quad amplifiers to be packaged in soic and microsoic packages, but it is the responsibility of the designer to determine what the actual junction temperature will be, and prevent it from exceed- ing the 150 c. note that while the q jc is similar between pack- age options, the q ja for the soic and tssop are nearly double the p-dip. the calculation of maximum ambient temperature is relatively simple to make. p tt max i max a a = - , q j (5) for example, with the 8-lead soic, the calculation gives a maximum internal power dissipation (for all amplifiers, worst case) of p max = (150 c C 85 c)/158 c/w = 0.41 w. for the dip package, a similar calculation indicates that 0.63 w (ap- proximately 50% more) can be safely dissipated. note that am- bient temperature is defined as the temperature of the pc board to which the device is connected (in the absence of radiated or convected heat loss). it is good practice to place higher power devices away from the more sensitive circuits. when in doubt, measure the temperature in the vicinity of the ssm2275 with a thermocouple thermometer. maximizing low distortion performance because the ssm2275/ssm2475 is a very low distortion amplifier, careful attention should be given to the use of the device to prevent inadvertently introducing distortion. source impedances seen by both inputs should be made equal, as shown in figure 28, with r b = r1 ? r f for minimum distortion. this eliminates any offset voltages due to varying bias currents. proper power supply decoupling reduces distortion due to power supply variations. because the open loop gain of the amplifier is directly dependent on the load resistance, loads of less than 10 k w will increase the distortion of the amplifier. this is a trait of any rail-to-rail op amp. increasing load capacitance will also increase distortion. it is recommended that any unused amplifiers be configured as a unity gain follower with the noninverting input tied to ground. this minimizes the power dissipation and any potential crosstalk from the unused amplifier. as with many fet-type amplifiers, the pmos devices in the input stage exhibit a gate-to-source capacitance that varies with the common mode voltage. in an inverting configuration, the in- verting input is held at a virtual ground and the common-mode voltage does not vary. this eliminates distortion due to input capacitance modulation. in noninverting applications, the gate- to-source voltage is not constant, and the resulting capacitance modulation can cause a slight increase in distortion. figure 30 shows a unity gain inverter and a unity gain follower configuration. figure 31 shows an fft of the outputs of these amplifiers with a 1 khz sine wave. notice how the largest har- monic amplitude (2nd harmonic) is C120 db below the funda- mental (0.0001%) in the inverting configuration. v in r1 r b r l 10 m f 0.1 m f r fb 0.1 m f 10 m f v out vC v+ ssm2275 v in r1 r b r l 10 m f 0.1 m f r fb 0.1 m f 10 m f v out ssm2275 vC v+ figure 30. basic inverting and noninverting amplifiers obsolete
ssm2275/ssm2475 rev. 0 C11C frequency ?hz ?00 ?30 ?60 0 22k noise ?dbv 10k 20k ?10 ?20 ?40 ?50 v sy =
ssm2275/ssm2475 rev. 0 C12C capacitive loading the output of the ssm2275/ssm2475 can tolerate a degree of capacitive loading. however, under certain conditions, a heavy capacitive load could create excess phase shift at the output and put the device into oscillation. the degree of capacitive loading is dependent on the gain of the amplifier. at unity gain, the am- plifier could become unstable at loads greater than 600 pf. at gain greater than unity, the amplifier can handle a higher degree of capacitive load without oscillating. figure 35 shows how to configure the device to prevent oscillations from occurring. r b 50k r i v out v in r fb c fb c l ssm2275 r b 50k r i v out v in r fb c fb c l ssm2275 inverting gain amplifier noninverting gain amplifier figure 35. configurations for driving heavy capacitive loads r b should be at least 50 k w . to minimize offset voltage, the parallel combination of r fb and r i should be equal to r b . set- ting a minimum c f of 15 pf bandlimits the amplifier enough to eliminate any oscillation problems from any sized capacitive load. the low-pass frequency is determined by: f rc db fb f - = 3 1 2 p (6) with r fb = 50 k w and c f = 15 pf, this results in an amplifier with a 210 khz bandwidth that can be used with any capacitive load. if the amplifier is being used in a non-inverting unity gain configuration and r i is omitted, c fb should be at least 100 pf. if the offset voltage can be tolerated at the output, r fb can be replaced by a short and c fb can be removed entirely. with the typical input bias current of 200 na and r b = 50 k w , the in- crease in offset voltage would be 10 mv. this configuration will stabilize the amplifier under all capacitive loads. single supply differential line driver figure 36 shows a single supply differential line driver circuit that can drive a 600 w load with less than 0.001% distortion. the design mimics the performance of a fully balanced trans- former based solution. however, this design occupies much less board space while maintaining low distortion and can operate down to dc. like the transformer based design, either output can be shorted to ground for unbalanced line driver applications without changing the circuit gain of 1. r13 and r14 set up the common-mode output voltage equal to half of the supply voltage. c1 is used to couple the input signal and can be omitted if the inputs dc voltage is equal to half of the supply voltage. the minimum input impedance of the cir- cuit as seen from v in is: rrrrrr in =+ () + () 15 3 7 11 || || (7) for the values given in figure 36, r in = 5 k w . with c1 omitted the circuit will provide a balanced output down to dc, otherwise the C3 db corner for the input frequency is set by: f rc db in l - = 3 1 2 p (8) the circuit can also be configured to provide additional gain if desired. the gain of the circuit is: a v v r r v out in == () 22 1 (9) where v out = v o1 C v o2 , r 1 = r3 = r5 = r7 and, r 2 = r4 = r6 = r8 figure 37 shows the thd+n versus frequency response of the circuit while driving a 600 w load at 1 v rms. r12 10k v c2 10 m f +5v r14 100k v r13 100k v ssm2475-c +12v r4 10k v ssm2475-b 1 2 r11 10k v c1* 10 m f +12v r7 10k v r3 10k v r8 10k v c4 10 m f r10 50 v +12v ssm2475-a r1 10k v r5 10k v r2 10k v r9 50 v c3 33pf r6 10k v c3 10 m f v in v 01 v 02 c1* is optional c4 33pf figure 36. a low noise, single supply differential line driver frequency ?hz 0.1 0.01 0.0001 20 20k 100 thd + n ?% 1k 0.001 10k
ssm2275/ssm2475 rev. 0 C13C multimedia soundcard microphone preamplifier the low distortion and low noise figures of the ssm2275 make it an excellent device for amplifying low level audio signals. fig- ure 38 shows how the ssm2275 can be configured as a stereo microphone preamplifier driving the input to a multimedia sound codec, the ad1848. the ssm2275 can be powered from the same +5 v single supply as the ad1848. the v ref pin on the ad1848 provides a bias voltage of 2.25 v for the ssm2275. this voltage can also be used to provide phantom power to a condenser microphone through a 2n4124 transistor buffer and 2 k w resistors. the phantom power circuitry can be omitted for dynamic microphones. the gain of ssm2275 amplifiers is set by r2/r1 which is 100 (40 db) as shown. figure 39 shows the devices thd+n performance with a 1 v rms output. l channel mic in 10? 4 6 5 8 7 10
ssm2275/ssm2475 rev. 0 C14C 6 7 5 100pf 330pf 16 15 14 13 12 11 10 9 18-bit dac v ref 18-bit serial reg. vol agnd 18-bit serial reg. 18-bit dac v ref vor vbl dgnd vbr lr dr ll dl ck v l v s 1 2 3 4 5 6 7 8 ad1868 220
ssm2275/ssm2475 rev. 0 C15C listing 1: ssm2275 spice macro-model * ssm2275 spice macro-model typical values * 8/97, ver. 1 * tam / adsc * * node assignments * non-inverting input * | inverting input * | | positive supply * | | | negative supply * | | | | output * || ||| * || ||| .subckt ssm2275 1 2 99 50 45 * * input stage * q1 4 3 5 qnix q2 6 2 7 qnix rc1 99 11 15e3 rc2 99 12 15e3 re1 5 8 1e3 re2 7 8 1e3 eos 3 1 poly(2) (61,98) (73,98) 1.5e-3 1.78e-5 1 ios 1 2 5e-9 ecmh1 4 11 poly(1) (99,50) 0.9 -30e-3 ecmh2 6 12 poly(1) (99,50) 0.9 -30e-3 ecml1 9 50 poly(1) (99,50) 0.1 30e-3 ecml2 10 50 poly(1) (99,50) 0.1 30e-3 d1 9 5 dx d2 10 7 dx d3 13 1 dz d4 2 13 dz ibias 8 50 200e-6 * * cmrr=115 db, zero at 1khz, pole at 10khz * ecm1 60 98 poly(2) (1,98) (2,98) 0 .5 .5 rcm1 60 61 159.2e3 rcm2 61 98 17.66e3 ccm1 60 61 1e-9 * * psrr=120db, zero at 1khz * rps1 70 0 1e6 rps2 71 0 1e6 cps1 99 70 1e-5 cps2 50 71 1e-5 epsy 98 72 poly(2) (70,0) (0,71) 0 1 1 rps3 72 73 1.59e6 cps3 72 73 1e-10 rps4 73 98 1.59 * * internal voltage reference * rsy1 99 91 100e3 rsy2 50 90 100e3 vsn1 91 90 dc 0 eref 98 0 (90,0) 1 gsy 99 50 poly(1) (99,50) 0.97e-3 -7e-6 * * adaptive pole and gain stage * at vsy= 5, fp=12.50mhz,av=1 * at vsy=30, fp=18.75mhz,av=1.16 * g2 98 20 poly(2) (4,6) (99,50) 0 80.3e-6 0 0 2.79e-6 vr1 20 21 dc 0 h1 21 98 poly(2) vr1 vsn1 0 11.317e3 0 0 -28.29e6 c2 20 98 1.2e-12 * * pole at 90mhz * g3 98 23 (20,98) 565.5e-6 r5 23 98 1.768e3 c3 23 98 1e-12 * * gain stage * g1 98 30 (23,98) 733.3e-6 r1 30 98 9.993e3 cf 30 45 200e-12 d5 31 99 dx d6 50 32 dx v1 31 30 0.6 v2 30 32 0.6 * * output stage * q3 46 42 99 qpox q4 47 44 50 qnox ro1 46 48 30 ro2 47 49 30 vo1 45 48 15e-3 vo2 49 45 10e-3 rb1 41 42 200 rb2 43 44 200 eo1 99 41 poly(1) (98,30) 0.7528 1 eo2 43 50 poly(1) (30,98) 0.7528 1 * * models * .model qnix npn(is=1e-16,bf=400,kf=1.96e-14,af=1) .model qnox npn(is=1e-16,bf=100,vaf=130) .model qpox pnp(is=1e-16,bf=100,vaf=130) .model dx d(is=1e-16) .model dz d(is=1e-14,bv=6.6) .ends ssm2275 obsolete
ssm2275/ssm2475 rev. 0 C16C c3239C8C10/97 printed in u.s.a. 8-lead soic (so-8) 0.1968 (5.00) 0.1890 (4.80) 8 5 4 1 0.2440 (6.20) 0.2284 (5.80) pin 1 0.1574 (4.00) 0.1497 (3.80) 0.0688 (1.75) 0.0532 (1.35) seating plane 0.0098 (0.25) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.0500 (1.27) bsc 0.0098 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) 8 0 0.0196 (0.50) 0.0099 (0.25) x 45 outline dimensions dimensions shown in inches and (mm). 14-lead soic (r-14) 14 8 7 1 0.3444 (8.75) 0.3367 (8.55) 0.2440 (6.20) 0.2284 (5.80) 0.1574 (4.00) 0.1497 (3.80) pin 1 seating plane 0.0098 (0.25) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.0688 (1.75) 0.0532 (1.35) 0.0500 (1.27) bsc 0.0099 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) 8 0 0.0196 (0.50) 0.0099 (0.25) x 45 14-lead plastic dip (n-14) 14 17 8 0.795 (20.19) 0.725 (18.42) 0.280 (7.11) 0.240 (6.10) pin 1 0.325 (8.25) 0.300 (7.62) 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) seating plane 0.022 (0.558) 0.014 (0.356) 0.060 (1.52) 0.015 (0.38) 0.210 (5.33) max 0.130 (3.30) min 0.070 (1.77) 0.045 (1.15) 0.100 (2.54) bsc 0.160 (4.06) 0.115 (2.93) 14-lead tssop (ru-14) 14 8 7 1 0.201 (5.10) 0.193 (4.90) 0.256 (6.50) 0.246 (6.25) 0.177 (4.50) 0.169 (4.30) pin 1 seating plane 0.006 (0.15) 0.002 (0.05) 0.0118 (0.30) 0.0075 (0.19) 0.0256 (0.65) bsc 0.0433 (1.10) max 0.0079 (0.20) 0.0035 (0.090) 0.028 (0.70) 0.020 (0.50) 8 0 8-lead plastic dip (n-8) 8 14 5 0.430 (10.92) 0.348 (8.84) 0.280 (7.11) 0.240 (6.10) pin 1 seating plane 0.022 (0.558) 0.014 (0.356) 0.060 (1.52) 0.015 (0.38) 0.210 (5.33) max 0.130 (3.30) min 0.070 (1.77) 0.045 (1.15) 0.100 (2.54) bsc 0.160 (4.06) 0.115 (2.93) 0.325 (8.25) 0.300 (7.62) 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) 8-lead micro soic (rm-8) 8 5 4 1 0.122 (3.10) 0.114 (2.90) 0.199 (5.05) 0.187 (4.75) pin 1 0.0256 (0.65) bsc 0.122 (3.10) 0.114 (2.90) seating plane 0.006 (0.15) 0.002 (0.05) 0.018 (0.46) 0.008 (0.20) 0.043 (1.09) 0.037 (0.94) 0.120 (3.05) 0.112 (2.84) 0.011 (0.28) 0.003 (0.08) 0.028 (0.71) 0.016 (0.41) 33 27 0.120 (3.05) 0.112 (2.84) obsolete

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